flink-project

Universal Serial Interface to FPGA's

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flink, Universal Serial Interface to FPGA's

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flink is ..

  • an universal serial interface to FPGA's
  • is open-source
  • is highly flexibel
  • is real-time capable

flink can be read as fast link or as the German “flink” meaning fast. It enables any processors to communicate with an external FPGA over a parallel interface (e.g. PCI, EIM, LPB) or serial interface (e.g. SPI). The FPGA may contain several blocks such as counters or pulse-width modulation. Such blocks are extensively used in robotics for control applications.
flink was developed at and is maintained by the NTB.

Overview

flink can be used on a multitude of targets and with various setups.
flink includes the following modules

  • flinkVHDL: Configuration for an external FPGA toghether with a suitable hardware link
  • flinkLinux: Kernel Modules
  • flinkLib: Userspace library for C/C++
  • flinkLibLite: Userspace library for OS-less systems for C/C++
  • flinkUtils: Utilities and test programs for the flink library
  • flinkDeep: Library for Java

Typical use with C/C++ under an operating system

Implement all necessary hardware modules with flink VHDL modules and interfaces and choose a suitable interconnection with the available flink Linux Kernel Modules. Develop your application using the flink Userspace Library. The following picture shows the system setup.

flink with OS and C/C++ programming

System Architecture

An external FPGA contains hardware modules, which provide certain functions such as a pwm generator or an analog input channel. Such an external FPGA is represented by a flink device. Every flink device contains one or more subdevices. A subdevice represents a function. At last every subdevice has one or more channels.

  • device: An external FPGA, group of subdevices.
  • subdevice: Modul with a specific function, such as digital IO or analog input.
  • channel: Single channel of a subdevice, corresponds to a single pin of a digital IO subdevice.
System architecture for an example system with a motor drive. The drive controlled by an analog output signal. The motor position is determined with a counter module.

Memory Mapping

Every subdevice which is specified in a device offers a standardised memory interface towards the driver library. The first 16 bytes comprise the header information which is read-only.

OffsetSize [byte] Namer/wConstDescription
0x004functionryesfunction, which this subdevice implements
0x044memory sizeryestotal memory size of this device, including header, subheader and subdevice specific information
0x084nof channelsryesnumber of channels of this subdevice
0x0c4unique idryesid identifying this subdevice

The field function has the following meaning:

31302928272625242322212019181716
function id
1514131211109876543210
subtype id interface version

All the available functions can be found in Available Subdevices. Next comes a subheader. It contains a configuration and status register. The meaning of the single bits of these registers can vary according to the function of the subdevice.

OffsetSize [byte] Namer/wConstDescription
0x104statusrnostatus of subdevice
0x144configuration r/wnoconfiguration word for subdevice
0x184 reserved
0x1c4 reserved

Header and subheader is followed by a subdevice specific part. The content varies according to the function and is listed in Available Subdevices

start.txt · Last modified: 2016/06/08 14:06 by tinner