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        <title>flink-project</title>
        <description>Universal Serial Interface to FPGA&#039;s</description>
        <link>https://flink-project.ch/</link>
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       <dc:date>2026-05-08T06:18:08+00:00</dc:date>
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                <rdf:li rdf:resource="https://flink-project.ch/flink_deep?rev=1700664281&amp;do=diff"/>
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                <rdf:li rdf:resource="https://flink-project.ch/flink_liblite?rev=1464773473&amp;do=diff"/>
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                <rdf:li rdf:resource="https://flink-project.ch/flink_python?rev=1698913676&amp;do=diff"/>
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        <link>https://flink-project.ch/</link>
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    <item rdf:about="https://flink-project.ch/flink_deep?rev=1700664281&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2023-11-22T14:44:41+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>flink_deep</title>
        <link>https://flink-project.ch/flink_deep?rev=1700664281&amp;do=diff</link>
        <description>flink, Java Library for deep
 Downloads
	*   deep on Github with flink classes 
	*   deep Installation

The flink Java library offers flink capabilities for our deep compiler. For more information see deep.

Overview
flink with deep / Java</description>
    </item>
    <item rdf:about="https://flink-project.ch/flink_example_1?rev=1456403564&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2016-02-25T12:32:44+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>flink_example_1</title>
        <link>https://flink-project.ch/flink_example_1?rev=1456403564&amp;do=diff</link>
        <description>flink on Phytec PCM032 Board (mpc5200)

The following example describes in detail how a Phytec PCM032 Board containing a mpc5200 and a FPGA is configured to be used with flink. The FPGA will contain a single channel PWM module and a single channel GPIO modul. flink was tested with the FPGA on the mpc5200io module as well as with an external FPGA connected through a SPI interface.</description>
    </item>
    <item rdf:about="https://flink-project.ch/flink_example_2?rev=1576592507&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2019-12-17T14:21:47+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>flink_example_2</title>
        <link>https://flink-project.ch/flink_example_2?rev=1576592507&amp;do=diff</link>
        <description>flink on Digilent ZYBO Board (ARM)

The following example describes in detail how a  Digilent ZYBO Board containing a ARM Processor and a Xilinx FPGA is configured to be used with flink. The FPGA will contain a single channel PWM module and a single channel GPIO module.</description>
    </item>
    <item rdf:about="https://flink-project.ch/flink_first_steps?rev=1517309432&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2018-01-30T10:50:32+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>flink_first_steps</title>
        <link>https://flink-project.ch/flink_first_steps?rev=1517309432&amp;do=diff</link>
        <description>First Steps

The development process for a flink system has two main parts: the configuration of the FPGA with the desired functions and the writing of the application software on the processor side. 

FPGA Side

Ready-made modules realising functions such as PWM or analog inputs are available and can be stitched together. Available functions can be found in</description>
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    <item rdf:about="https://flink-project.ch/flink_lib?rev=1718279344&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2024-06-13T11:49:04+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>flink_lib</title>
        <link>https://flink-project.ch/flink_lib?rev=1718279344&amp;do=diff</link>
        <description>flink Userspace Library
 Downloads
	*   flink Userspace Library on Github

This is the user documentation for the flink userspace library in C. It provides a device and bus independent interface to the underlying driver modules. For more information about the inner workings see  flink Userspace Library on Github. The</description>
    </item>
    <item rdf:about="https://flink-project.ch/flink_liblite?rev=1464773473&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2016-06-01T09:31:13+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>flink_liblite</title>
        <link>https://flink-project.ch/flink_liblite?rev=1464773473&amp;do=diff</link>
        <description>flink Userspace Library Lite
 Downloads
	*   flink Library for small Micros

This library can be deployed on smaller microprocessors without any proper operating system. A flink device can be connected by a simple interface such as a parallel bus, SPI or I2C.

Overview

The lite library offer all the flink capabilities on systems without support from an operating system. Low-level drivers for various interfaces such as SPI or I2C manage the interfacing with the external FPGA.</description>
    </item>
    <item rdf:about="https://flink-project.ch/flink_linux?rev=1702998625&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2023-12-19T15:10:25+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>flink_linux</title>
        <link>https://flink-project.ch/flink_linux?rev=1702998625&amp;do=diff</link>
        <description>flink Linux Kernel Modules
 Downloads
	*   flink Linux Kernel Modules on Github

This is the user documentation for the flink kernel modules. They offer drivers capabilities to communicate with various hardware interfaces. For more information about the inner workings see flink Linux Kernel Modules on Github. The driver API</description>
    </item>
    <item rdf:about="https://flink-project.ch/flink_python?rev=1698913676&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2023-11-02T08:27:56+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>flink_python</title>
        <link>https://flink-project.ch/flink_python?rev=1698913676&amp;do=diff</link>
        <description>Python Wrapper for flink
 Downloads
	*   flink Python Wrapper on Github

This is a Python wrapper for the flink Userspace Library. flink devices as well as all their integrated subdevices can be easily accessed. The wrapper allows control of the high-level API as well as the low-level API.

How to Use


import flink
import time

dev = flink.FlinkDevice()
dev.lsflink()

gpio = flink.FlinkGPIO()
gpio.setDir(pin, True)
gpio.setValue(pin, not gpio.getValue(pin))
time.sleep(1)
gpio.setValue(pin, not …</description>
    </item>
    <item rdf:about="https://flink-project.ch/flink_utils?rev=1456403564&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2016-02-25T12:32:44+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>flink_utils</title>
        <link>https://flink-project.ch/flink_utils?rev=1456403564&amp;do=diff</link>
        <description>flink Utilities

There are several small command line tools for working with a flink device.
For the time being these utilities can be found in flink Userspace Library. Building and installation is done together with the flink userspace library.
 Manpages
	*   flink Utilities Manpages</description>
    </item>
    <item rdf:about="https://flink-project.ch/flink_vhdl?rev=1702454869&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2023-12-13T08:07:49+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>flink_vhdl</title>
        <link>https://flink-project.ch/flink_vhdl?rev=1702454869&amp;do=diff</link>
        <description>VHDL
 Downloads
	*   flink VHDL Modules on Github

This is the user documentation for the flink VHDL modules. At the current state flink is available for Altera and Xilinx FPGAs.







Overview
 Functions
	*  Available functions 

We currently support various functions which are implemented in subdevices. More functions will be developed in the near future.</description>
    </item>
    <item rdf:about="https://flink-project.ch/multiple_subdevices_with_the_same_number_of_ports?rev=1456403563&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2016-02-25T12:32:43+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>multiple_subdevices_with_the_same_number_of_ports</title>
        <link>https://flink-project.ch/multiple_subdevices_with_the_same_number_of_ports?rev=1456403563&amp;do=diff</link>
        <description>Multiple subdevices with the same number of ports

If multiple subdevices of the same type, same number of ports and different unique_id in addition to a subdevice of the same type and different number of ports is used, an error occurs. The following pages explain, how this error can be resolved.</description>
    </item>
    <item rdf:about="https://flink-project.ch/sidebar?rev=1700664316&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2023-11-22T14:45:16+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>sidebar</title>
        <link>https://flink-project.ch/sidebar?rev=1700664316&amp;do=diff</link>
        <description>Navigation

	*  Home 
	*  flink VHDL subdevices and interfaces 
	*  flink Linux Kernel Modules 
	*  flink Userspace Library
	*  flink Library Lite
	*  flink Utilities
	*  flink Python Library
	*  flink Java Library

----------

	*  flink First Steps 
	*  flink on a Phytec PCM032 Board 
	*  flink on a Digilent ZYBO</description>
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    <item rdf:about="https://flink-project.ch/start?rev=1723035959&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2024-08-07T13:05:59+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>start</title>
        <link>https://flink-project.ch/start?rev=1723035959&amp;do=diff</link>
        <description>flink, Universal Interface to FPGA&#039;s
 Downloads
	*   flink on Github

flink is ..

	*  an universal serial interface to FPGA&#039;s
	*  a collection of useful blocks in a FPGA
	*  open-source
	*  highly flexible
	*  real-time capable

flink can be read as fast link or as the German</description>
    </item>
    <item rdf:about="https://flink-project.ch/subdevices?rev=1712688384&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2024-04-09T18:46:24+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>subdevices</title>
        <link>https://flink-project.ch/subdevices?rev=1712688384&amp;do=diff</link>
        <description>Available Subdevices

The functions given below have so far been implemented as VHDL modules (see flinkVHDL). For all of them a suitable driver is available in the flink Userspace Library and the flinkLite Library.
function idnamedescription0x00Infoinfo subdevice with description0x01AnalogInanalog input, ADC0x02AnalogOutanalog output, DAC0x05DigitalIOdigital input and output, GPIO0x06Countercounter0x0c</description>
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