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Universal Serial Interface to FPGA's

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flink_example_1

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flink_example_1 [2015/03/28 08:17] – ursgrafflink_example_1 [2015/03/28 08:19] – [Onboard FPGA connected through Local Plus Bus] ursgraf
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  spi_setup(dev);  spi_setup(dev);
 </code> </code>
-Finally, compile kernel modules (see [[software:flink:flink_linux|flink Linux Kernel Modules]]), transfer them to the target and load them:+Finally, compile kernel modules (see [[flink_linux|flink Linux Kernel Modules]]), transfer them to the target and load them:
 <code> <code>
 insmod flink.ko insmod flink.ko
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 ==== flink library and application ==== ==== flink library and application ====
-Compile the flink library (see [[software:flink:flink_lib|flink Userspace Library]]) together with several test applications. Transfer the library and the test application to the target. Make sure that your library path includes the actual location of your library. Run test applications such as ''lsflink'', ''flinkdio'' or ''flinkpwm''.+Compile the flink library (see [[flink_lib|flink Userspace Library]]) together with several test applications. Transfer the library and the test application to the target. Make sure that your library path includes the actual location of your library. Run test applications such as ''lsflink'', ''flinkdio'' or ''flinkpwm''.
  
 ===== Onboard FPGA connected through Local Plus Bus ===== ===== Onboard FPGA connected through Local Plus Bus =====
  
 === Setup === === Setup ===
-  * Configure the board with a working Linux kernel and root file system or use the system described in [[software:linux:emdebian:phycore-mpc5200b|Installation von Emdebian Grip auf den Phytec phyCORE-MPC5200B]]  +  * Configure the board with a working Linux kernel and root file system or use the system described in [[http://wiki.ntb.ch/infoportal/software/linux/emdebian/phycore-mpc5200b|Installation von Emdebian Grip auf den Phytec phyCORE-MPC5200B]]  
   * Make sure that the device tree blob is up-to-date. It must contain a node for the FPGA sitting on the local plus bus.   * Make sure that the device tree blob is up-to-date. It must contain a node for the FPGA sitting on the local plus bus.
   * Get necessary sources for the flink project.<code>git clone https://github.com/flink-project/flinkvhdl.git   * Get necessary sources for the flink project.<code>git clone https://github.com/flink-project/flinkvhdl.git
flink_example_1.txt · Last modified: 2016/02/25 13:32 by 127.0.0.1

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