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--- flink_example_1 [2015/03/27 17:17] – ursgraf
+++ flink_example_1 [2016/02/25 13:32] (current) – external edit 127.0.0.1
@@ Line 14: / Line 14: @@
 ==== Configure the FPGA ====
 Proceed as described in [[flink_vhdl|flink VHDL]].
-  * In 5: add a block //gpio// and a block //pwm// to the system. Also add a //spi_to_avalon// module. Leave the standard values as they are except for the PWM module, whose base clock depends on your FPGA clock. Set ''unique_id'' of the //gpio// subdevice to 0x20 and the ''unique_id'' of the //pwm// subdevice to 0x30  [{{ :software:flink:lpb_mpc5200b_to_avalon.png?500 | //Adding an interface block// }}] TODO improve picture. Use SPI settings as given in the picture.
+  * In 5: add a block //gpio// and a block //pwm// to the system. Leave the standard values as they are except for the PWM module, whose base clock depends on your FPGA clock. Set ''unique_id'' of the //gpio// subdevice to 0x20 and the ''unique_id'' of the //pwm// subdevice to 0x30. Also add a //spi_to_avalon// module. Use SPI settings as given in the picture below. [{{ spi_avalon.png?500 | //Adding an interface block// }}]
-  * In 6: set the ''unique id'' of the info subdevice to 0x10 and the ....
+  * In 6: set the ''unique id'' of the info subdevice to 0x10. Convert a chosen string into a digital value and enter this value in the field ''description''. ''dev_size'' should be 0x1c0 for our configuration.
-  * After 10: the System should now look like: [{{ :software:flink:lpb_mpc5200io_qsys_sys.png?700 | //Complete system// }}] TODO improve picture
+  * After 10: the system should now look like: [{{ spi_qsys.png?700 | //Complete system// }}]
 Connect the FPGA with the SPI pins on the mpc5200.
@@ Line 67: / Line 66: @@
 === Build into kernel ===
-Compile kernel modules (see [[software:flink:flink_linux|flink Linux Kernel Modules]]) and add them to your kernel image. Add a subnode ''flink_spi'' to your device tree under the node ''spi''. In the compatible statement you must specify which protokoll driver to load (''compatible = "flink_spi"''). You can also specify the clock frequency. When booting the SPI-subsystem will automatically load a master driver (''spi-mpc5200'' or ''spi-mpc5200-psc'') and the protokoll driver ''flink_spi''.
+Compile kernel modules (see [[flink_linux|flink Linux Kernel Modules]]) and add them to your kernel image. Add a subnode ''flink_spi'' to your device tree under the node ''spi''. In the compatible statement you must specify which protokoll driver to load (''compatible = "flink_spi"''). You can also specify the clock frequency. When booting the SPI-subsystem will automatically load a master driver (''spi-mpc5200'' or ''spi-mpc5200-psc'') and the protokoll driver ''flink_spi''.
 === Load manually ===
@@ Line 95: / Line 94: @@
 	spi_setup(dev);
 </code>
-Finally, compile kernel modules (see [[software:flink:flink_linux|flink Linux Kernel Modules]]), transfer them to the target and load them:
+Finally, compile kernel modules (see [[flink_linux|flink Linux Kernel Modules]]), transfer them to the target and load them:
 <code>
 insmod flink.ko
@@ Line 103: / Line 102: @@
 ==== flink library and application ====
-Compile the flink library (see [[software:flink:flink_lib|flink Userspace Library]]) together with several test applications. Transfer the library and the test application to the target. Make sure that your library path includes the actual location of your library. Run test applications such as ''lsflink'', ''flinkdio'' or ''flinkpwm''.
+Compile the flink library (see [[flink_lib|flink Userspace Library]]) together with several test applications. Transfer the library and the test application to the target. Make sure that your library path includes the actual location of your library. Run test applications such as ''lsflink'', ''flinkdio'' or ''flinkpwm''.
 ===== Onboard FPGA connected through Local Plus Bus =====
 === Setup ===
-  * Configure the board with a working Linux kernel and root file system or use the system described in [[software:linux:emdebian:phycore-mpc5200b|Installation von Emdebian Grip auf den Phytec phyCORE-MPC5200B]]
+  * Configure the board with a working Linux kernel and root file system or use the system described in [[http://wiki.ntb.ch/infoportal/software/linux/emdebian/phycore-mpc5200b|Installation von Emdebian Grip auf den Phytec phyCORE-MPC5200B]]
   * Make sure that the device tree blob is up-to-date. It must contain a node for the FPGA sitting on the local plus bus.
   * Get necessary sources for the flink project.<code>git clone https://github.com/flink-project/flinkvhdl.git
@@ Line 115: / Line 114: @@
 === Configure the FPGA ===
-Proceed as described in [[software:flink:flink_vhdl|VHDL]].
+Proceed as described in [[flink_vhdl|flink VHDL]].
-  * In 5: add a block //gpio// and a block //pwm// to the system. Also add a //lpb_mpc5200b_to_avalon// module. Leave the standard values as they are except for the PWM module, whose base clock should be 33000000. Set ''unique_id'' of the //gpio// subdevice to 0x20 and the ''unique_id'' of the //pwm// subdevice to 0x30  [{{ :software:flink:lpb_mpc5200b_to_avalon.png?500 | //Adding an interface block// }}] TODO improve picture
+  * In 5: add a block //gpio// and a block //pwm// to the system. Also add a //lpb_mpc5200b_to_avalon// module. Leave the standard values as they are except for the PWM module, whose base clock should be 33000000. Set ''unique_id'' of the //gpio// subdevice to 0x20 and the ''unique_id'' of the //pwm// subdevice to 0x30  [{{ lpb_avalon.png?500 | //Adding an interface block// }}]
-  * In 6: set the ''unique id'' of the info subdevice to 0x10 and the ....
+  * In 6: set the ''unique id'' of the info subdevice to 0x10. Convert a chosen string into a digital value and enter this value in the field ''description''. ''dev_size'' should be 0x1c0 for our configuration.
-  * After 10: the System should now look like: [{{ :software:flink:lpb_mpc5200io_qsys_sys.png?700 | //Complete system// }}] TODO improve picture
+  * After 10: the system should now look like: [{{ lpb_qsys.png?700 | //Complete system// }}]
   * In 15: assign the pins as follows:
@@ Line 164: / Line 163: @@
 |reset_reset_n|in|PIN_N9|
-The pins for the PWM output and the GPIO have to be assigned according to your hardware. The FPGA can be loaded through the onboard PROM or through serial loading from the processor, see [[software:linux:emdebian:phycore-mpc5200b|Installation von Emdebian Grip auf den Phytec phyCORE-MPC5200B]].
+The pins for the PWM output and the GPIO have to be assigned according to your hardware. The FPGA can be loaded through the onboard PROM or through serial loading from the processor, see [[http://wiki.ntb.ch/infoportal/software/linux/emdebian/phycore-mpc5200b|Installation von Emdebian Grip auf den Phytec phyCORE-MPC5200B]].
 ==== Loading the kernel modules ====
-Compile the Linux kernel modules ([[software:flink:flink_linux|flink Linux Kernel Modules]]), transfer them to the target and load them with
+Compile the Linux kernel modules ([[flink_linux|flink Linux Kernel Modules]]), transfer them to the target and load them with
 <code>
 insmod flink.ko

flink-project

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