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flink_example_2 [2018/02/04 11:02] – [Setup FPGA Design] sfink | flink_example_2 [2018/02/04 11:03] – [Setup FPGA Design] sfink | ||
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- | In the end the block diagram should look like this: | + | In the end the block diagram should look like this: \\ |
- | Instead of the " | + | (Instead of the " |
{{:: | {{:: |