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Universal Serial Interface to FPGA's

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flink_vhdl

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flink_vhdl [2018/01/29 22:33]
sfink [Building]
flink_vhdl [2018/01/30 11:11] (current)
sfink [Building]
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   - In the Block Design press "Run Connection Automation"​ -> add all Subdevices ​   - In the Block Design press "Run Connection Automation"​ -> add all Subdevices ​
   - Right click on the ports of the subdevices and create ports nesessary. ​   - Right click on the ports of the subdevices and create ports nesessary. ​
-  - Open the „Address Editor“-tab and make sure that all devices have a Range of 4k and that there are no gaps between two devices. If an infoDevice is used make sure it is on the first memory address. ​+  - Open the „Address Editor“-tab and make sure that all devices have a Range of 4k and that there are no gaps between two devices. If an infoDevice is used make sure it is on the first memory address. ​[{{ ::​address-editor.png?​400 | Range and address offset of flink devices}}]
   - Add pin mapping. For specific boards you can get your .xdc-files [[https://​reference.digilentinc.com/​reference/​programmable-logic/​zybo/​start | here ]].   - Add pin mapping. For specific boards you can get your .xdc-files [[https://​reference.digilentinc.com/​reference/​programmable-logic/​zybo/​start | here ]].
   - Ensure that every fLink Subdevice has its own unique id.   - Ensure that every fLink Subdevice has its own unique id.
-  - If an infoDevice is used double click on the IP and add the "Dev Size". Every fLink Subdevice has a dev size of 4096.+  - If an infoDevice is used double click on the IP and add the "Dev Size". Every fLink Subdevice has a dev size of 4096.[{{ :​infodevice-settings-4subdevices.png?​200 | "Dev Size" of an infoDevice with 4 flink subdevices}}]
   - Right click on your Block Design and select "​Create HDL Wrapper"​.   - Right click on your Block Design and select "​Create HDL Wrapper"​.
   - Under „PROGRAM AND DEBUG“ select „Generate Bitstream“.   - Under „PROGRAM AND DEBUG“ select „Generate Bitstream“.
flink_vhdl.txt · Last modified: 2018/01/30 11:11 by sfink

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