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subdevices [2020/04/03 09:49] – [ADC] ursgraf | subdevices [2020/05/26 16:27] – [Counter] ursgraf | ||
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The status register in the subheader is unused with this function. In the configuration register setting the bit 0 will reset the subdevice. | The status register in the subheader is unused with this function. In the configuration register setting the bit 0 will reset the subdevice. | ||
==== Subtypes ==== | ==== Subtypes ==== | ||
- | Currently there are two subtypes of this subdevice. The subtype information can be found in the '' | + | Currently there are three subtypes of this subdevice. The subtype information can be found in the '' |
^Subtype ID^Description^Example^ | ^Subtype ID^Description^Example^ | ||
|0x1|Simple ADC with continuous sampling|ADC128S102| | |0x1|Simple ADC with continuous sampling|ADC128S102| | ||
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===== Counter ===== | ===== Counter ===== | ||
- | All modules which count something can implement this interface. An example for this could be a FQD (fast quadrature decoder). It counts the number of edges of a signal. | + | All modules which count something can implement this interface. An example for this could be a FQD (fast quadrature decoder). It counts the number of edges of a signal. The counter module implements a 16 bit counter, hence, reading the counter value will return only 2 bytes. |
^Offset^Size [byte] ^Name^r/ | ^Offset^Size [byte] ^Name^r/ | ||
|0x20|4|count_0|r|no|counter channel 0| | |0x20|4|count_0|r|no|counter channel 0| |