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subdevices [2020/06/09 16:33] – [DAC] ursgraf | subdevices [2020/06/09 16:35] – [PWM] ursgraf | ||
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A value of ' | A value of ' | ||
The status register in the subheader is unused with this function. In the configuration register setting the bit 0 will reset the subdevice. \\ | The status register in the subheader is unused with this function. In the configuration register setting the bit 0 will reset the subdevice. \\ | ||
- | At powerup all pins will be inputs. This subdevice uses a pin of the device for each channel. | + | At powerup all pins will be inputs. This subdevice uses a pin on the FPGA device for each channel. |
===== Counter ===== | ===== Counter ===== | ||
Line 83: | Line 83: | ||
|0xyy+4|4|htime_1|r/ | |0xyy+4|4|htime_1|r/ | ||
|..|4|..|r/ | |..|4|..|r/ | ||
- | The status register in the subheader is unused with this function. In the configuration register setting the bit 0 will reset the subdevice. | + | The status register in the subheader is unused with this function. In the configuration register setting the bit 0 will reset the subdevice. This subdevice uses a pin on the FPGA device for each channel. |
===== PPWA ===== | ===== PPWA ===== |