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subdevices [2021/01/15 13:13] – [Watchdog] ursgraf | subdevices [2021/01/15 16:10] – [Watchdog] ursgraf | ||
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^Offset^Size [byte] ^Name^r/ | ^Offset^Size [byte] ^Name^r/ | ||
|0x20|4|base_clk|r|yes|base clock in Hz| | |0x20|4|base_clk|r|yes|base clock in Hz| | ||
- | |0x24|4|status_conf|r/ | + | |0x24|4|counter|r/ |
- | |0x28|4|counter|r/ | + | |
- | === status_conf === | + | The last bit in the status |
- | | 31 | ... | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | | + | The last bit in the configuration register holds the rearm bit. When the watchdog has fired (timed out), it has to be reset by setting the rearm bit. Write ' |
- | | | | | | | | | |rearm|status| | + | |
- | status: | + | |
- | rearm: When the watchdog has fired (timed out), it has to be reset with this signal. Write ' | + | |
counter: set the watchdog timeout before you arm the watchdog. | counter: set the watchdog timeout before you arm the watchdog. | ||