flink-project

Universal Serial Interface to FPGA's

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flink_linux [2015/04/05 12:05] – ursgrafflink_linux [2023/12/19 16:10] (current) – [Module Parameters] ursgraf
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 ===== Overview ===== ===== Overview =====
-When flink is used on a Linux based system the flink library in userspace communicates with the hardware by means of several kernel modules. The basic module is ''flink.ko''. Further, every flink device needs one more kernel module for each hardware interface which is used to communicate with an external FPGA. This could be ''flink_pci.ko'' or ''flink_spi.ko''. They use the appropriate Linux subsystem //pci// or //spi//, respectively. +When flink is used on a Linux based system the flink library in userspace communicates with the hardware by means of several kernel modules. The basic module is ''flink.ko''. Further, every flink device needs one more kernel module for each hardware interface which is used to communicate with an external FPGA. This could be ''flink_pci.ko'', ''flink_spi.ko'', ''flink_lpb'', ''flink_axi'' or ''flink_eim''. They use the appropriate underlying subsystem for the particular bus. 
  
 ===== Requirements ===== ===== Requirements =====
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 ===== Building ===== ===== Building =====
-  * Clone git repository: <code> git clone https://github.com/flink-project/flinklinux.git</code>+  * Clone git repository: <code>git clone https://github.com/flink-project/flinklinux.git --recursive 
 +cd flinklinux 
 +git submodule init 
 +git submodule update</code>
   * Choose the target plattform and find its appropriate kernel configuration together with the kernel headers. Find more help about this in [[https://www.debian.org/releases/stable/i386/ch08s06.html.en|Compiling a New Kernel]] \\ \\   * Choose the target plattform and find its appropriate kernel configuration together with the kernel headers. Find more help about this in [[https://www.debian.org/releases/stable/i386/ch08s06.html.en|Compiling a New Kernel]] \\ \\
   * Build for the host plattform with: <code>make</code>   * Build for the host plattform with: <code>make</code>
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 | mpc5200/flink_lpb.ko | device memory length (see below) | for local plus bus | mpc5200/flink_lpb dev_mem_length=0x280 | | mpc5200/flink_lpb.ko | device memory length (see below) | for local plus bus | mpc5200/flink_lpb dev_mem_length=0x280 |
 | imx6/flink_eim.ko | | for EIM bus |  | | imx6/flink_eim.ko | | for EIM bus |  |
 +| zynq/flink_axi.ko |either hardcoded into module or reading device tree node| for AXI bus |  |
  
-Busses like //PCI// have discoverability built into them. Any device connected to such a bus can tell the system, what kind of device it is and what resources it uses. On the //SPI// this is not possible. Therefore, you must provide the total device memory length when loading the module. This length is determined by the number and types of the subdevices implemented in VHDL, see [[flink_vhdl|flink VHDL]]. \\ If an //info subdevice// is present, it will give the information about the total device size and the parameter can be ommitted, see [[flink_vhdl#info_subdevice]]. +Busses like //PCI// have discoverability built into them. Any device connected to such a bus can tell the system, what kind of device it is and what resources it uses. On the //SPI// this is not possible. Therefore, you must provide the total device memory length when loading the module. This length is determined by the number and types of the subdevices implemented in VHDL, see [[flink_vhdl|flink VHDL]]. \\ If an //info subdevice// is present, it will give the information about the total device size and the parameter can be ommitted, see [[flink_vhdl#info_subdevice|Info Subdevice]]. 
  
 ===== Performance ===== ===== Performance =====
 When parallel busses such as PCI or LocalPlusBus are used, any flink transfer happens very quickly and basically depends on the speed of the bus and the FPGA. Care has to be taken when using the SPI interface. The standard SPI subsystem in a standard Linux distribution uses an internal queueing mechanism which is rather slow. Subsequent transfers of a message are separated by approximately 70μs. Further, every flink read or write includes a 8 byte transfer (address and data phase). Though SPI allows for full duplex transfers this feature cannot be used here.\\ When parallel busses such as PCI or LocalPlusBus are used, any flink transfer happens very quickly and basically depends on the speed of the bus and the FPGA. Care has to be taken when using the SPI interface. The standard SPI subsystem in a standard Linux distribution uses an internal queueing mechanism which is rather slow. Subsequent transfers of a message are separated by approximately 70μs. Further, every flink read or write includes a 8 byte transfer (address and data phase). Though SPI allows for full duplex transfers this feature cannot be used here.\\
 IMPORTANT When using SPI timing considerations become crucial. As a rule of thumb: Every flink transfer (such as updating a PWM high time or reading a encoder value takes up to 200μs. SPI should be used for low-frequency control application with not too many parallel channels. IMPORTANT When using SPI timing considerations become crucial. As a rule of thumb: Every flink transfer (such as updating a PWM high time or reading a encoder value takes up to 200μs. SPI should be used for low-frequency control application with not too many parallel channels.
flink_linux.1428228339.txt.gz · Last modified: 2016/02/25 13:32 (external edit)

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