Universal Serial Interface to FPGA's
This is the user documentation for the flink kernel modules. They offer drivers capabilities to communicate with various hardware interfaces. For more information about the inner workings see flink Linux Kernel Modules on Github. The driver API can be found under API
When flink is used on a Linux based system the flink library in userspace communicates with the hardware by means of several kernel modules. The basic module is
flink.ko. Further, every flink device needs one more kernel module for each hardware interface which is used to communicate with an external FPGA. This could be
flink_eim. They use the appropriate underlying subsystem for the particular bus.
git clone https://github.com/flink-project/flinklinux.git --recursive cd flinklinux git submodule init git submodule update
make ARCH=arch CROSS_COMPILE=comp KERNELDIR=path
with the following settings
arch: target plattform such as
comp: cross compiler such as
path: path to kernel headers
depmodto create suitable dependency files for the new modules. This step is not necessary if modules are loaded with
Create the makefile with cmake (in the root directory):
After this generate the documentation as given in the
Doxyfile by :
/lib/modules/versionof the target plattform.
Determine the availabe parameters for each kernel module with the command
modinfo. The following table shows the currently available modules with their parameters.
|flink_pci.ko||vendor id, product id||for pci interface||flink_pci vid=0x1172 (Altera) pid=4|
|flink_spi.ko||device memory length (see below)||for spi interface||flink_spi dev_mem_length=0x280|
|mpc5200/flink_lpb.ko||device memory length (see below)||for local plus bus||mpc5200/flink_lpb dev_mem_length=0x280|
|imx6/flink_eim.ko||for EIM bus|
Busses like PCI have discoverability built into them. Any device connected to such a bus can tell the system, what kind of device it is and what resources it uses. On the SPI this is not possible. Therefore, you must provide the total device memory length when loading the module. This length is determined by the number and types of the subdevices implemented in VHDL, see flink VHDL.
If an info subdevice is present, it will give the information about the total device size and the parameter can be ommitted, see info_subdevice.
When parallel busses such as PCI or LocalPlusBus are used, any flink transfer happens very quickly and basically depends on the speed of the bus and the FPGA. Care has to be taken when using the SPI interface. The standard SPI subsystem in a standard Linux distribution uses an internal queueing mechanism which is rather slow. Subsequent transfers of a message are separated by approximately 70μs. Further, every flink read or write includes a 8 byte transfer (address and data phase). Though SPI allows for full duplex transfers this feature cannot be used here.
IMPORTANT When using SPI timing considerations become crucial. As a rule of thumb: Every flink transfer (such as updating a PWM high time or reading a encoder value takes up to 200μs. SPI should be used for low-frequency control application with not too many parallel channels.