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Universal Serial Interface to FPGA's

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flink_vhdl

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flink_vhdl [2023/12/13 07:49] – [Building] ursgrafflink_vhdl [2023/12/13 09:07] (current) – ursgraf
Line 36: Line 36:
 ===== Building ===== ===== Building =====
 ==== Quartus ==== ==== Quartus ====
-  - Start Quartus and create a new project.+  - Start Quartus and create a new project. We use QuartusII Web Edition, though, newer versions work as well.
   - Choose your appropriate device.   - Choose your appropriate device.
   - Under //Device -> Device and Pin Options... -> Unused Pins// choose //As input tri-stated with weak pull-up//. Without this setting the system will not work later!   - Under //Device -> Device and Pin Options... -> Unused Pins// choose //As input tri-stated with weak pull-up//. Without this setting the system will not work later!
flink_vhdl.1702450143.txt.gz · Last modified: 2023/12/13 07:49 by ursgraf

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